The control storage of a microprocessor typically has a read-only storage (ROS) portion for storing microinstructions of the most basic, repetitive type, and a read/write memory (RAM) portion for storing higher level microinstructions. With the advent of very large scale integrated circuitry, many storage and logic functions can be embodied on the same semiconductor chip. What is needed is a combined read-only storage and read/write random access memory storage cell which can be advantageously employed in a control storage for a microprocessor, all on the same very large scale integrated circuit chip.
Another problem which occurs with the production of ROS devices is that after a period of field testing, engineering changes are made to the ROS design and then existing ROS devices which have been stockpiled must be scrapped. What is needed is the ability to salvage ROS devices and make productive use of them after the existing ROS design has been rendered obsolete. This could be done by combining other functions such as a RAM function into a memory cell with the ROS device, the RAM function then being available to make productive use of the ROS semiconductor devices which would otherwise have been scrapped.
Still further, the testing of random access memories by propagating bit patterns through the RAM is generally done both at the time of manufacture and when a data processing machine containing the RAM device is eventually turned on. Generally the source of such test patterns is an external testing unit, either a device tester at the time of production or an operating system program when the RAM is to be tested in its actual application at start-up time. An improvement in the speed and reliability of such tests could be accomplished by incorporating the test pattern bits in an accompanying read-only storage memory integrally associated in the same cell with the RAM.